Because you can just look into it and see if it's what you sent fof production, and if not and the word gets out you are done as a fab. Fab business is about trust. You also should trust that your design isn't leaked to the competition.
It's very common to xray the dies, especially for debugging. Also common is to etch it layer by layer, take photos and rebuild the circuit schematic, mainly for reverse engineering but I've seen companies doing it to their own dies too.
Things get more blurry at the board level, the combinations of suppliers and service providers are endless.
That’s a nice theory. Fab is one thing, but there are afterwards packaging and testing facilities where silicon can be swapped. I worked for a short time for a military contractor. They don’t X-ray every single chip. They just use it assuming the ordered chip is the one which was delivered by the markings on the package.
They make sense when you consider that 'on detector' electronics has all sorts of constraints that FPGAs cant compete on: Power, Density, Radiation hardness, Material budget.
> If you went 48 straight to POL voltages then you would have horrific converter performance.
What's horrific converter performance in numbers?
An isolated flyback (to 12V) should be able to hit >92% and doesn't care if it's fed -48V or +48V or ±24V. TI webench gives me 95% though I'd only believe that if I'd built and measured it. What's the performance of your -48V → +48V?
[with the caveat that these frequently require custom transformers... not an issue with large runs, but finding something that can be done with an existing part for smaller runs is... meh]
-48 to 48 claims something like 97% (load dependent of course). It also needs to arbitrate between two input supplies for glitchless redundancy, plus have PM bus and other spec mandated stuff. There is no technical reason why you cant go -48 -> 12 as you state with good efficiceny, but we cant get hold of a part that ticks all the boxes.
Horrific performance by my definition would be 48v to say 1v. We only realistically use buck topologies for POL supplies. Such a ratio is really bad for current transients, not to mention issues like minimum on times for the controller.
I'm just surprised that either input isolation isn't on your spec, or it still somehow works out better with isolated to +48V than straight to 12V... but I guess if your spec requires other things, it makes sense.
Well if it's negative 48V the electricty flows out of your circuit and back to the grid, so you need to make it positive to have the electricity come in.
Is a 155 throws enough to evaluate bias? Seems more times than I'd like to roll some dice, but not enough to gain enough measurement confidence. By what criteria is the person assigning the traffic light ratings? What about face coplanarity? Get this enthusiast in a metrology lab.!
No, it's much too low. OP shows Pearson's X^2 for their results, but that alone is meaningless. p-value would be the interesting metric. I haven't computed it (although we could from the results) but I expect it to be very high, i.e. it's likely to observe these results even with perfect dice.
For a multiple IVF treatment case (a fancy hospital might have 40% cycle to birth rate remember) it would not be unusual to have ~100 actual injections.
10 seconds per day is a little over 115 ppm. What is the frequency error of the reference clock that ultimately drives the ADC connected to the microphone?
To quote TFA: "...outputs strictly designed to farm green squares on github, grind out baseless bug bounties, artificially inflate sprint velocity, or maliciously comply with corporate KPI metrics".
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