If anything x86 is a proof that evolution works better in market adoption than nuking everything, specially when not every company cares about the bazaar, only their cathedrals.
Interesting and surprising! Is there a source for this?
There seems to have been a lot of work on emulation by Gary Davidian from an early stage - starting with the AMD 29000 then 88k and then finally on PowerPC - according to his CHM oral history.
The version of this story I heard first comes from the (absurdly fun, if you’re into that sort of thing) 65scribe YouTube channel’s video on the PowerMac 8100:
Apple was planning to go with a radical new design, breaking with the past in both software and hardware, but Gary Davidian & co. saved them from their own foolishness via a skunkworks project that actually could ship.
By complete co-incidence I have a blog post on the various Mac CPU transitions in draft that should be out tomorrow.
One mildly amusing point, which I don't think is mentioned in either link is that the Cognac project was so called because the surname of John Hennessy, of Stanford RISC and MIPS fame, is also, of course, the name of a brand of Cognac.
I don't know if it was the 68000 but Apple demanded that when they adopted POWER, Motorola could still supply chips. But Motorolas core couldn't be made to run POWER. So PowerPC is basically a merge between IBM Power core and Motorola's next generation core.
The term "condition-code register" predates by decades both the Motorola MC68000 (1979) and the IBM POWER (1990). It was a term used in many unrelated computers.
Already in 1964, in IBM System/360, the condition-code was a part of a bigger register, the "processor status word". The terms are much older than that.
Also in MC68000, the CCR is a part of the bigger status register, which, unlike the CCR, can be accessed only by privileged programs.
In POWER, the condition register also holds only the condition-code part of the status, but it has room for 8 groups of condition codes, to allow high speed even for cheaper in-order CPUs, which do not have register renaming (where otherwise a shared condition-code register would prevent the concurrent execution of instructions).
Yeah, in practical implementations the 32-bit Power condition register is more like eight four-bit ones, and lots of code will run compares in parallel to different fields. It's one of the architecture's notable strengths.
If anything x86 is a proof that evolution works better in market adoption than nuking everything, specially when not every company cares about the bazaar, only their cathedrals.